Advanced Digital Logic Design

Chapter02 - Home
Exercises: 1 - 2 - 3 - 4 - 5 - 6 - 7 - 8 - 9 - 10 - 11 - 12 - 13

Exercise. This is the solution to exercise 2.1 in the book.

Solution.

Schematic pros: it is closer to, if not identical with, the actual hardware that will be implemented.

Schematic cons: it is huge for large designs, likely to introduce errors; shows only structure, cannot describe temporal behavior.

HDL pros: can include both behavior and structure; allows testing of behaviors using test vectors.

HDL cons: language needs to be written carefully so that synthesis tools generate the intended hardware.